Technical Paper Round-up: June 14
source link: https://semiengineering.com/technical-paper-round-up-june-14/
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Technical Paper Round-up: June 14
GAA; CIM architecture; MIT’s AI Chip; hybrid bonding; wafer defects; quantum; DL for Materials; electro-optics modulator; wide bandgap; design hiding schemes
New technical papers added to Semiconductor Engineering’s library this week.
| Technical Paper | Research Organizations |
|---|---|
| Reconfigurable heterogeneous integration using stackable chips with embedded artificial intelligence | MIT, along with Harvard University, Tsinghua University, Zhejiang University, & others |
| AlphaGo Game Influences Argonne’s New AI Tool For Materials Discovery | Argonne National Lab with contributions from ORNL |
| Semiconductor Defect Detection by Hybrid Classical-Quantum Deep Learning | National Tsing Hua University |
| Microstructure Development of Cu/SiO₂ Hybrid Bond Interconnects After Reliability Tests | TU Dresden and other |
| Mapping of the mechanical response in Si/SiGe nanosheet device geometries | IBM T.J. Watson Research Center and Brookhaven National Laboratory. Sponsored by U.S. DOE |
| Recent advances and applications of deep learning methods in materials science | NIST, UCSD, Lawrence Berkeley National Laboratory, Carnegie Mellon University, Northwestern University, and Columbia University |
| Gigahertz free-space electro-optic modulators based on Mie resonances | Harvard John A. Paulson School of Engineering and Applied Sciences (SEAS), in collaboration with researchers at U. of Washington |
| Accuracy and Resiliency of Analog Compute-in-Memory Inference Engine | UCLA |
| Wide Bandgap Semiconductors for Extreme Temperature and Radiation Environments | ORNL (Oak Ridge National Lab) |
| Magnifying Quantum Phase Fluctuations with Cooper-Pair Pairing | Université PSL, CNRS, Sorbonne Université, Université Paris-Diderot, Inria de Paris, PSL Research University |
| Hardening Circuit-Design IP Against Reverse-Engineering Attacks | University of Florida |
Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting links to papers.
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