LEGO logic gates and mechanical computing

A few people have designed boolean logic devices using LEGO pneumatics and gone on to develop fundamental computer devices such as full-adders and flip-flops. These have been discussed greatly on LUGNET.
I had suspected that there would be a large number of logic devices using mechanic principals, but (back in 2004) a search for mechanical logic devices didn't get many hits. One mechanical logic page detailed the use of rods to make logic gates.
To my surprise I only came across two LEGO webpages that gave any details of mechanical logics gates. The first page, has details of a LEGO NOT gate. And the second page, sadly both are now defunct, had photos of an extremely complicated AND gate using clockwise and anti-clockwise rotation to represent the logic states. If you made any mechanical logic gates then please contact me.
Finally some one answered the call and even though they're not LEGO, but K'NEX, I'll give you the link to William Hilton's video of his K'NEX logic gates. They still use a push-pull system like mine, but the design is quite different. Since then there have been numerous attempts as google will tell, but in general their inspiration is ultimately drawn from these and my own.
Originally I considered using a clockwise rotation of an axle for logical 1 and anti-clockwise rotation for logical 0. This is the method used in the other LEGO logic gates I found. However, I simply couldn't conceive of any way to decouple the axle motions from two inputs to a single output - other than a NOT gate (I have now developed a method of doing this as I describe on this page). I decided to try using push/pull-rods to represent the logic states. Pushing an axle in would be logical 1, and pulling an axle out would be a logic 0. The advantage of this method is that you can used both linear and rotational motion. My mechanical logic gates take one-stud length of motion and convert it to another one-stud of linear motion.
I have now designed working versions of all the basic gates, the NOT, OR, NOR, AND, and NAND gates. More recently I've produced an XOR gate that is a single gate in its own right, i.e. not a composition of ANDs, ORs and NOTs. Using two NAND gates I created a NAND gate latch or Flip-Flop. The natural follow on from these is clocked logic, half and full adders and ultimately a genuine "computer" device. These gates are just demonstrators. They work, but because of the limitations that arise through gear slippage and inertia, the real practicable use is limited.

The NOT gate was the first and easiest gate to design. All you have to do is ensure that one push-rod does the opposite of the other as can be seen in the pictures.
The original NOT gate is very over-engineered and in many ways the NOT gate as an entity is redundant. On all the logic gates to NOT an input you only need to reverse the direction of the cog that drives the rack forward or backward. This is easily affected by simply having the input push-rod acting at the bottom or the top of the cog depending on which way you need the rack to move.
The cog's direction is different in each case, so any rack that the cog acts on will also move in an opposite direction. This is exactly the motion we require when NOTing an input. The only time an output needs to be NOTd is if we are't going to use it as an input to another gate, even then, with the available gates, a NOT gate shouldn't be required.

The buffer gate is effectively a modification of the NOT gate and there are several ways to construct them. I chose a simple system of differently sized cogs (24 and 8 tooth), but levers would work equally well. The idea is to take a half-stud input and convert it to a one-stud output, thereby creating an in-line amplification, albeit passively. The pictures should show this more clearly, alternatively you can watch the video of the buffer in action.

The OR and NAND gate related, one is simply the other with NOTd inputs, which is why they're both in this section.

The OR gate

The OR gate was the first logic gate I designed that actually does something. I decided to make the OR gate after the NOT gate because with these two you can make NAND, AND, and NOR gates.
The key mechanism in the OR gate is the rotation of one of the cross-beams. This allows either input rod to go back or forward, separately, without changing the position of the output rod. The fixed cross-beam at the other end of the shaft will move forward regardless of whether it is pushed by one or both input rods. The four input and output states are shown on the figures below.
The step-by-step instructions on how to build the model are available for downloading.
And if you're keen to see it in action there is also a video available to watch.

The NAND gate

Logically a NAND gate is the same as an OR gate with NOTd inputs. This is a very useful equivalence. There are two ways I could have done this to my OR gate. The easiest is to use the NOT gate at each input. The other way was by recognising that to NOT the inputs just requires an extra cog in each gear train, to reverse the motion of the racks. This should be clear from the four logic states shown in the photos.
Unfortunately, by using extra cogs, the gate suffers from the tiny amount of slack in the gears. This reduces the linear motion of the push-rods to the extent that after two gates in series everything grinds to a halt.
The step-by-step instructions on how to build the model are available for downloading.
There is also a video available to watch.

Just as the OR gate and NAND gates are related, so to are the AND gate and NOR gate, and as such both are featured in this section.

The AND gate

It might appear to be a simple matter to just NOT the output of the >NAND gate and get an AND gate. But, if you reverse the internal shaft mechanism of the OR gate, interchanging the position the fixed and rotating beam, then the OR gate becomes an AND gate! What's more it means that a NAND gate can now be made with fewer parts than previously (one NOT+AND,versus two NOTs+OR).
The step-by-step instructions on how to build the model are available for downloading.
There is also a video available to watch.

The NOR gate

Like the NAND gate, the NOR gate can be made simple by NOTing the OR gate output. However, just as the NAND gate can also be made by NOTing the inputs of the OR gate, if the inputs of the AND gate are NOTd then you get a NOR gate. Again this can be achieved by using the NOT gates or by adding an additional cog into the gear train.
The step-by-step instructions on how to build the model are available for downloading.
There is also a video available to watch.

The XOR gate

The XOR gate differs from a normal OR gate in that the 1,1 input gives a zero out. The XOR gate is of great importance as it is a fundamental component of the adder.
This was the most difficult gate to build, mainly because it is a composite gate made from two ANDs, two NOTs and an OR gate. Sure I could have made it that way, but this isn't satisfactory and given the inertia and gear slippage, it meant that a half adder was probably never going to happen. But around Jan 05 I finally cracked it.
The gate makes use of a sort of lever system. These are pushed from their top or bottom and will rotate about their centre if pushed only from either. Here's the trick, if the lever is pushed from the top and bottom at the same time it will move laterally. OK that's not the clearest of explanations, but hopefully the photos below, which show the gate in its four possible states along with a cut away photo showing the internal workings will make things more lucid. Failing that have a look at the XOR gate video that is available to download.

The Flip-Flop

The flip-flop is a composite logic gate usually made from NANDs or NORS. As with the half adder, without flip-flops modern computing wouldn't exist.
Once you have a nice simple working NOR or NAND gate then building Flip-Flops (FF) becomes a simple matter. In computing FFs are pretty important since they form the basis of memory. A FF is a device made with either two NOR or two NAND gates. Most FFs are made using NAND gates and there are several different types. The basic operation takes the output of one gate as the input of the other gate and vice versa. This means a FF has two inputs and two outputs. The pictures of the LEGO FF should show what's going on along with the description below.
The initial set up of the FF is Set=1, Clear=1 and Q=1, Qbar=0.
Pulse Clear to 0. This makes Q=0 and Qbar=1, notice now that since the right hand NAND output is 1, Clear will have no effect on either Q or Qbar.
Now pulse Set to 0. This turns Q=1 and Qbar=0. In this case the left hand NAND gate output is 1 and so changing the value of Set will not do anything.

The Clocked Flip-Flop

If you look at any digital electronic book, you'll soon see that anything useful tends to make use of a clock pulse to synchronise everything. The clock input is separate from the logic inputs, but they are related. A simple way to implement a clock is by using two NAND gates. Doing this changes the set and clear operations from working on a 0 to 1 transition to working on a 0 to 1 transition. The clocked Flip-Flop examples should show what's happening along with their descriptions below.
The initial set up of the FF, Set, Clock (clk), Clear and Qbar are at a logic level of 0 and Q is 1.
Pulse Clear to 1, then pulse to Clock (clk) to 1. This makes Q=0 and Qbar=1. Just as before the right hand NAND output is 1, so the Clear will have no effect on either Q or Qbar.
The Clock goes to 0 and then Clear goes to 0. It has to be done in this order to prevent the outputs becoming indeterminate.
Now pulse Set to 1 and the clk to 1. This turns Q=1 and Qbar=0. The left hand NAND gate output is 1 and so changing the value of Set will not do anything.
The Clock goes to 0 and then Set goes to 0. Just as before it has to be done in this order to present the outputs becoming indeterminate.
It is possible to build an edge detector for the Clock signal. It requires a few more NAND gates. The advantage of doing this is that it no longer matters when the Clock signal goes back to 0 and the indeterminate state is avoided.

The Half adder

The half adder is a fundamental building block of computing. The device is made from an XOR gate and an AND gate. There are two inputs, which are fed into both the XOR and the AND gate. There are also two outputs, one from the XOR gate and one from the AND gate. The XOR output is called the sum, S and the AND output is called the carry, C.
The device adds binary numbers, as the name suggests! That is, in the case of adding two bits together, the sum of 0+0 = 0, carry 0; 0+1 = 1, carry 0; 1+0 = 1, carry 0 and 1+1 = 0, carry 1. Unfortunately it can only add two bits, which obviously limits its usefulness. However, by combining two half adders, one can get a full adder, which in turn can be cascaded to produce a binary adder of any size.
The pictures above show the LEGO half adder in its four different states, where A and B are the inputs, S is the sum and C is the carry bit.
There is also a video available of it being operated.

Powered Push-Pull Gates

The push-pull logic gates suffer from two significant problems. The first is inertia, the second is output attenutaion. Icreased inertia means that as more gates are added a greater and greater force on the first gate's input is required to affect the last gate's output. The output attenutation is a consequence of slippage in the mechanism, such as in the gears. This splippage error is cumulatative meaning that after a few gates a change in logical state in the first may not change anything in the last.

To overcome both these problems a means to power the gates is necessary. To achieve this I've used linear accuators to take a rotational input to drive the push-pull logic mechanism. The logic then switches the driection of the output rotation hence changing the rotating logic state on the inputs of the next gate in the circuit.
In effect there is a unification between the push-pull system and the rotational system which allows for more complicated feedback gates like flip-flips to be created.