According to the most recent Ericsson Mobility Report, by 2027, cellular IoT devices will make up over 60% of all cellular connections, with a number projected as high as 5.5 billion cellular devices. 

At the heart of this cellular connectivity is 5G NR, which is the highest performance, most sophisticated wireless protocol to date.

A high-level overview of 5G NR characteristics. Image used courtesy of Moniem Tech

Being a new technology with a high level of sophistication, the barrier to entry for 5G NR devices can be hauntingly high. Yesterday, in an attempt to streamline the 5G NR design process, CEVA announced a new 5G platform architecture and IP offerings.

This article will explore some of the challenges with designing for 5G NR and how CEVA hopes to address these issues.

Challenges With 5G NR

5G NR, as a protocol, has introduced higher throughput, lower latency, and higher density connection than previous generations. Most importantly, compared to previous long-term evolution (LTE) releases, 5G NR introduces a significant amount of design challenges for the engineer.

One of the challenges that designers must meet in both hardware and software is the stringent timing requirements of 5G NR. As the communication standards become complex and faster across multiple layers, the timing constraints between the processor and the RF front end become even more critical. Specifically, timing requirements as tight as 16 us must be met in some cases, requiring specialized hardware to achieve this with a high level of determinism.

On top of this, another challenge for 5G NR is the need for increased processing power. Working at faster data rates than ever before, 5G NR requires high speed, powerful processing units are being required. 

National Instruments describes how the need for time-accurate processing and parallel computing is even more pressing with the complexity in MAC layer functionality, robust schedulers, and the focus on software-defined networks. 

One way to address this is by using heterogeneous computing architectures, which require high-speed data links between devices.

These challenges, amongst many others, are making the rapid development and deployment of 5G NR hardware solutions increasingly difficult.

CEVA’s PentaG2

With these challenges in mind, CEVA released their new PentaG2 architecture, a 5G NR IP set meant to reduce the entry barriers for handset OEMs looking to internalize 5G NR modem/SoC design.

As its second-generation offering, PentaG2 is a fully configurable IP platform built on top of a heterogeneous compute platform. 

There are two different PentaG2 offerings: PentaG2-Max and PentaG2-Lite.

PentaG2-Max is specifically designed to target wideband eMBB in mmWave handsets and employs a variety of accelerator blocks. G2-Max integrates a specialized VDSP core, a neural-network coprocessor, and advanced scalar and vector DSP processors. 

This offering hopes to enable high performance for low-power, battery-powered devices.

Block diagram of PentaG2-Max. Image used courtesy of CEVA

PentaG2-Lite, on the other hand, was designed to support a range of reduced capacity use cases. 

CEVA claims that its Lite offering is an extremely efficient and lean baseband implementation, which offers a complete processing chain. The hardware unique to PentaG2-Lite includes a small footprint digital signal processor (DSP) controller to meet low power budgets.

Block diagram of PentaG2-Lite. Image used courtesy of CEVA

Both offerings are meant to externally interface with an RF front end, and consist of integrated 4G/5G demodulator and modulator subsystems, as well as system L2 cache. 

According to CEVA, the platform as a whole supports a variety of use cases, including 5G eMBB, URLLC, Sidelink, and RedCap for both mmWave and sub-6 GHz, as well as legacy LTE and Cat 1 technologies. 

Additionally, the platform is also said to sustain bit rates from 100 Mbps, on the low power IoT end, to 10 Gbps for high-performance handsets.

Pushing to the Next Phase of 5G NR

As the design of 5G hardware becomes more complicated, the PentaG2 platform from CEVA hopes to ease the design process by providing fully-fledged IP solutions. 

Overall, CEVA hopes to provide a simpler design process as well as faster time to market for OEMs looking to design their own proprietary 5G NR hardware. It will be interesting to see how this new IP could open the door for future 5G products and design.