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Scaling Down: Intel Boasts RibbonFET and PowerVia as Next IC Design Solution

 2 years ago
source link: https://www.allaboutcircuits.com/news/scaling-down-intel-boasts-ribbonfet-and-powervia-as-next-ic-design-solution/
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Scaling Down: Intel Boasts RibbonFET and PowerVia as Next IC Design Solution

2 days ago by Jake Hertz

As part of its recent roadmap, Intel teased RibbonFET and PowerVia, two new technologies that it hopes will change the IC industry through backside power delivery and a gate-all-around architecture.

Earlier this week, Intel laid out an ambitious roadmap for the next five years and beyond. This roadmap was rife with information, from a detailed roadmap to changes in nomenclature and the introduction of new manufacturing techniques

RibbonFET and PowerVia are two transistor-level innovations from Intel.
RibbonFET and PowerVia are two transistor-level innovations from Intel. Image used courtesy of Intel

Amongst the announcements, Intel also introduced some brand new technology that it plans to leverage to scale them down to Intel 20A and lower. The new technologies are called PowerVia and RibbonFET, the latter being Intel's first new transistor architecture since FinFET in 2011. 

This article will tease out the new technologies and understand how they could help Intel continue to scale its ICs in the future. 

PowerVia: A New Backside Power Delivery Solution

One of the current challenges to scaling ICs today is the reliability of their power delivery networks.

As ICs get denser and denser, but overall chip size gets larger (think the increasing popularity of SoCs), the physical interconnect quickly becomes the system bottleneck. 

Power delivery networks are becoming highly resistive, contributing to increased IR loss, while a higher number of transistors and faster clock speeds are contributing to increased Ldi/dt loss. In today's power delivery network, a 10% voltage margin between the regulator and the transistors is considered acceptable, but this gets continually harder to meet as ICs continue to scale. 

A model of the parasitics in a power delivery network from board to IC.
A model of the parasitics in a power delivery network from board to IC. Image used courtesy of Arm

To address this issue moving forward, Intel is announcing PowerVia. PowerVia is Intel's take on a recently discovered technique called backside power delivery: a scheme where all the power-delivering interconnects are buried beneath the transistors. 

Backside power delivery feeds power from underneath the transistors.
Backside power delivery feeds power from underneath the transistors. Image used courtesy of Prasad et al

This technique could help Intel scale, as it has been shown to significantly decrease resistance in power delivery networks. 

Research has also shown that backside power delivery works considerably better than conventional methods as you scale down, offering a 1% voltage margin compared to the traditional 10%. Beyond this, burying the power delivery beneath the transistors also leaves more room for signal interconnects above the transistors, resulting in even further ability to scale. 

Though Intel isn't the only company looking into backside power delivery as a future solution, another advancement it is investing in is the next step beyond FinFETs.

Goodbye FinFET, Hello RibbonFET 

The second big technological breakthrough that Intel plans to employ moving forward is RibbonFET, the company's first new transistor architecture since FinFET, which, at the time, was revolutionary. 

An example of Intel's RibbonFET.
An example of Intel's RibbonFET. Image used courtesy of Intel

FinFETs were an innovation that provided more control over the channel as transistors scaled at the 22 nm node and below. However, when continuing to scale down to the 5 nm node and below, it has been publicly accepted that FinFETs will no longer cut it, as single-finned devices will no longer provide enough drive current to support operation. 

RibbonFET is a GAA transistor that helps it scale in ways a FinFET could not.
RibbonFET is a GAA transistor that helps it scale in ways a FinFET could not. Image used courtesy of Lam Research

RibbonFET is Intel's solution to this problem at 5 nm or below. RibbonFET, called nanosheets by other groups, utilizes a stack of semiconductor sheets to form the channel. Whereas the gate in a FinFET covers the channel region on three sides, the nanosheets are surrounded by the gate, classifying the device as a gate-all-around (GAA) device. This architecture leads to improved electrostatic control of the transistor, faster transistor switching speeds, and acceptable driving currents in a smaller footprint. 

A Hopeful Roadmap

Often, if the path you are currently on doesn't seem to be panning out exactly as planned, it might require some adjusting or even require starting over.

Looking forward, Intel has clearly laid out its path to success, being transparent with the world about exactly what its goals are and how they plan to achieve them. Only time will tell whether or not these goals are met, but given its well-defined goals and direction, the future looks to be optimistic. It will be interesting to see how this roadmap unfolds and what Intel rolls out. 


Have you kept up with Intel's latest roadmap? What are your thoughts on Intel's plans? Let us know in the comments down below.


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