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GitHub - pgate1/SNES_on_FPGA: implemented SNES on an FPGA.

 4 years ago
source link: https://github.com/pgate1/SNES_on_FPGA
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README.md

SNES on FPGA

Implemented SNES on an FPGA.
The hardware discription language is original expanded SFL+.
(SFL: Structured Function description Language Tutorial)

FPGA data is available at:
https://pgate1.at-ninja.jp/SNES_on_FPGA/index.html#release

feat. DE2-115 68747470733a2f2f7067617465312e61742d6e696e6a612e6a702f534e45535f6f6e5f465047412f4445322d3131355f32303135303632372e6a7067

feat. DE0-CV 68747470733a2f2f7067617465312e61742d6e696e6a612e6a702f534e45535f6f6e5f465047412f4445302d43565f32303137303830322e6a7067


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